PCB Fabrication
Material, stack-up, copper, drilling, plating, solder mask, finish, panelization, and electrical test.
A practical overview of fabrication, advanced PCB technology, component sourcing, assembly, inspection, testing, and file requirements for prototype and repeat-production programs.
Use each service independently or combine design review, fabrication, sourcing, assembly, testing, and box build within one coordinated project workflow.
Material, stack-up, copper, drilling, plating, solder mask, finish, panelization, and electrical test.
HDI, RF, rigid-flex, heavy copper, metal core, controlled impedance, and fine-pitch structures.
SMT, THT, BGA, fine-pitch and mixed-technology assembly for prototype and production quantities.
Turnkey, partial-turnkey, consigned kits, approved vendors, and alternative-part review.
Incoming checks, bare-board verification, AOI, X-ray, impedance, electrical, and functional testing.
Programming, coating, cable integration, enclosure assembly, labeling, packaging, and final release.
These values are general production guidelines. Final capability depends on the complete stack-up, material, copper weight, feature density, tolerances, board size, and quantity.
| Parameter | Typical Capability | Engineering Notes |
|---|---|---|
| Layer Count | 2–8 layers standard; up to 32 layers by review | Stack-up, copper balance, impedance, and lamination requirements are reviewed. |
| Materials | FR-4, high-Tg FR-4; specialty laminates by review | RF, flex, rigid-flex, HDI, aluminum, and halogen-free materials require project review. |
| Board Thickness | Common constructions from 0.2–3.2 mm | Finished tolerance depends on laminate, copper, plating, mask, and pressing conditions. |
| Minimum Trace / Space | 0.10 / 0.10 mm (4 / 4 mil) typical standard | Finer geometry depends on copper thickness, layer position, density, and yield. |
| Mechanical Drill | 0.20 mm typical standard minimum | Evaluate with board thickness, plating, finished hole, and aspect ratio. |
| Minimum Annular Ring | 0.15 mm / 6 mil typical target | Depends on drill tolerance, layer registration, and required acceptance class. |
| Copper Weight | 1–3 oz typical; heavier copper by review | Copper affects trace/space, etch compensation, thickness, and thermal behavior. |
| Controlled Impedance | Single-ended and differential control | Provide target, tolerance, reference layers, and stack-up constraints. |
| Solder Mask | LPI; green, red, blue, black, white | Mask dam and registration depend on pitch, geometry, and color. |
| Surface Finish | HASL, lead-free HASL, ENIG, OSP | Other finishes and hard-gold edge contacts are reviewed per project. |
| Panelization | V-score, tab route, breakaway rails | Tooling holes, fiducials, rails, and component keep-outs should be defined. |
| Electrical Test | 100% bare-board electrical test | Flying probe or fixture test is selected according to design and quantity. |
Advanced builds receive a dedicated review of materials, via structures, copper geometry, stack-up, fabrication sequence, and assembly handling.
1+N+1 and 2+N+2 structures, laser microvias, blind/buried vias, and via-in-pad options.
Low-loss materials, controlled impedance, copper-profile, and surface-finish considerations.
Bend areas, coverlay, stiffeners, transition geometry, and assembly-use review.
Power-electronics constructions with copper distribution, spacing, and thermal review.
Aluminum and thermal-management boards with dielectric and isolation requirements.
BGA-supporting fabrication with feature limits based on copper, pads, and registration.
Single-ended and differential structures aligned with the approved stack-up.
Up to 32 layers with copper balance, lamination cycle, and impedance review.
Assembly routes are selected according to board technology, package type, quantities, test coverage, and final integration requirements.
| Capability | Available Scope | Requirements |
|---|---|---|
| Assembly Options | SMT, THT, mixed, single- or double-sided | Assembly drawings, centroid data, polarity, and special instructions. |
| Fine-Pitch Components | Down to 01005; QFP, QFN, LGA, BGA by review | Land pattern, stencil, reflow, coplanarity, and inspection method. |
| Sourcing Models | Turnkey, partial-turnkey, consigned components | BOM, approved vendors, alternates, date-code, and traceability needs. |
| Soldering | Lead-free and leaded processes by requirement | State RoHS, alloy, temperature, and component compatibility requirements. |
| First Article | Engineering first-article verification | Critical placement, polarity, workmanship, and configuration approval. |
| Programming | Customer-defined device programming | Firmware, revision control, interface, security, and verification instructions. |
| Functional Test | Customer-defined test plan | Fixture, procedure, limits, expected outputs, and failure handling. |
| Special Processes | Coating, potting, underfill, cleaning | Material, masking, cure, thickness, rework, and acceptance criteria. |
| Box Build | Enclosure, wiring, labels, final assembly | Mechanical drawings, torque, wiring, packaging, and final test requirements. |
Inspection and testing are planned according to board technology, hidden-joint risk, customer specifications, and required coverage.
A complete data package enables faster engineering review and a more accurate quotation.
Gerber or ODB++, NC drill, fabrication drawing, stack-up, impedance, materials, finish, and quantity.
Gerber, BOM, pick-and-place, assembly drawings, approved vendors, alternates, and build quantity.
Firmware, interface, fixture details, procedures, expected outputs, limits, and reporting needs.
Mechanical drawings, wiring instructions, labels, torque, packaging, and final inspection criteria.
Send your files and technical requirements. Our engineering team will review manufacturability, assembly scope, testing needs, and the information required for a clear quotation.
A concise five-page reference covering standard PCB, advanced constructions, PCBA, inspection, testing, file requirements and tolerance guidance.
Parameters reviewed and updated:
Use these values for early planning. Project acceptance depends on the complete data package and engineering review.
| Parameter | Planning capability | Qualification note |
|---|---|---|
| Layer count | 2–8 layers standard; up to 32 by review | Stack-up, copper balance and lamination review required. |
| Board thickness | Common constructions from 0.2–3.2 mm | Finished tolerance depends on complete construction. |
| Minimum trace / space | 0.10 / 0.10 mm (4 / 4 mil) typical standard | 3 / 3 mil and other finer geometry only by engineering review. |
| Mechanical drill | 0.20 mm typical standard minimum | Subject to thickness, plating, finished hole and aspect ratio. |
| Minimum annular ring | 0.15 mm / 6 mil typical target | Depends on drill tolerance, registration and acceptance class. |
| Copper weight | 1–3 oz typical; heavier copper by review | Trace/space and finished thickness change with copper weight. |
| Surface finish | HASL, lead-free HASL, ENIG, OSP | Other finishes and hard-gold edge contacts by review. |
| Technology | Available scope | Engineering review |
|---|---|---|
| HDI | 1+N+1, 2+N+2, laser microvias, blind/buried vias, via-in-pad options | Via structure, copper fill and sequential lamination. |
| RF / high frequency | Low-loss materials and controlled impedance | Laminate, copper profile, insertion loss and finish. |
| Rigid-flex / flex | Coverlay, stiffeners and rigid-flex transitions | Bend region, transition geometry and use conditions. |
| Heavy copper | Power constructions; >3 oz by review | Spacing, copper balance, plating and thermal behavior. |
| Metal core | Aluminum and thermal-management boards | Dielectric system, isolation and thermal path. |
| Multilayer | Up to 32 layers by review | Lamination cycle, registration, copper balance and impedance. |
| Capability | Available scope | Required project input |
|---|---|---|
| Assembly | SMT, THT, mixed, single- or double-sided | Assembly drawings, centroid data and polarity notes. |
| Fine pitch | Down to 01005; QFP, QFN, LGA, BGA by review | Land pattern, stencil, reflow and inspection method. |
| Sourcing | Turnkey, partial-turnkey and consigned | BOM, approved vendors, alternates and traceability. |
| Programming | Customer-defined device programming | Firmware, interface, security and verification instructions. |
| Value-added | Coating, potting, underfill, cleaning and box build | Material, masking, cure, mechanical and acceptance criteria. |
| Stage | Typical methods | Customer requirements |
|---|---|---|
| Incoming | Material/component identity, condition and document checks | Approved BOM, material callouts and traceability. |
| Bare board | AOI, 100% electrical test, impedance verification; microsection where applicable | IPC class, coupon/impedance targets and report scope. |
| Assembly | Visual inspection, AOI and X-ray for hidden joints | Package risks, workmanship criteria and coverage. |
| Final release | Electrical or functional test, configuration, labels and packaging | Fixture, procedure, limits, expected outputs and failure handling. |
State all critical board outline, thickness, finished-hole, copper, impedance, solder-mask registration and controlled-depth tolerances on the fabrication drawing or purchase specification.
Where no project-specific tolerance is agreed, applicable industry-standard production tolerances are used.